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<div class="title">xcsudma_hw.h File Reference</div>  </div>
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Macros</h2></td></tr>
<tr class="memitem:gaf7ae40275005f5b2c827da41a0e3cc23"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gaf7ae40275005f5b2c827da41a0e3cc23">XCSUDMA_HW_H_</a></td></tr>
<tr class="memdesc:gaf7ae40275005f5b2c827da41a0e3cc23"><td class="mdescLeft">&#160;</td><td class="mdescRight">Prevent circular inclusions by using protection macros.  <a href="group__csuma__api.html#gaf7ae40275005f5b2c827da41a0e3cc23">More...</a><br/></td></tr>
<tr class="separator:gaf7ae40275005f5b2c827da41a0e3cc23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae02862bee946eeb9f0684d24550d1afa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gae02862bee946eeb9f0684d24550d1afa">XCsuDma_In32</a>&#160;&#160;&#160;Xil_In32</td></tr>
<tr class="memdesc:gae02862bee946eeb9f0684d24550d1afa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input operation.  <a href="group__csuma__api.html#gae02862bee946eeb9f0684d24550d1afa">More...</a><br/></td></tr>
<tr class="separator:gae02862bee946eeb9f0684d24550d1afa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae5b5c8718f050b6b4e25380a92c9aa0d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gae5b5c8718f050b6b4e25380a92c9aa0d">XCsuDma_Out32</a>&#160;&#160;&#160;Xil_Out32</td></tr>
<tr class="memdesc:gae5b5c8718f050b6b4e25380a92c9aa0d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Output operation.  <a href="group__csuma__api.html#gae5b5c8718f050b6b4e25380a92c9aa0d">More...</a><br/></td></tr>
<tr class="separator:gae5b5c8718f050b6b4e25380a92c9aa0d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga356d29aa2d43a1b724700007be7dcd51"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga356d29aa2d43a1b724700007be7dcd51">XCsuDma_ReadReg</a>(BaseAddress, RegOffset)&#160;&#160;&#160;<a class="el" href="group__csuma__api.html#gae02862bee946eeb9f0684d24550d1afa">XCsuDma_In32</a>((BaseAddress) + (u32)(RegOffset))</td></tr>
<tr class="memdesc:ga356d29aa2d43a1b724700007be7dcd51"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro reads the given register.  <a href="group__csuma__api.html#ga356d29aa2d43a1b724700007be7dcd51">More...</a><br/></td></tr>
<tr class="separator:ga356d29aa2d43a1b724700007be7dcd51"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5a2390fe93e02061d01c3b9e057b3b2b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga5a2390fe93e02061d01c3b9e057b3b2b">XCsuDma_WriteReg</a>(BaseAddress, RegOffset, Data)&#160;&#160;&#160;<a class="el" href="group__csuma__api.html#gae5b5c8718f050b6b4e25380a92c9aa0d">XCsuDma_Out32</a>((BaseAddress) + (u32)(RegOffset), (u32)(Data))</td></tr>
<tr class="memdesc:ga5a2390fe93e02061d01c3b9e057b3b2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro writes the value into the given register.  <a href="group__csuma__api.html#ga5a2390fe93e02061d01c3b9e057b3b2b">More...</a><br/></td></tr>
<tr class="separator:ga5a2390fe93e02061d01c3b9e057b3b2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Registers offsets</div></td></tr>
<tr class="memitem:ga76fcd0f2a0c7ebc2058f231a944c7109"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga76fcd0f2a0c7ebc2058f231a944c7109">XCSUDMA_ADDR_OFFSET</a>&#160;&#160;&#160;0x000U</td></tr>
<tr class="memdesc:ga76fcd0f2a0c7ebc2058f231a944c7109"><td class="mdescLeft">&#160;</td><td class="mdescRight">Address Register Offset.  <a href="group__csuma__api.html#ga76fcd0f2a0c7ebc2058f231a944c7109">More...</a><br/></td></tr>
<tr class="separator:ga76fcd0f2a0c7ebc2058f231a944c7109"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf5d3e01cba7a5d0029901f690007a9c0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gaf5d3e01cba7a5d0029901f690007a9c0">XCSUDMA_SIZE_OFFSET</a>&#160;&#160;&#160;0x004U</td></tr>
<tr class="memdesc:gaf5d3e01cba7a5d0029901f690007a9c0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Size Register Offset.  <a href="group__csuma__api.html#gaf5d3e01cba7a5d0029901f690007a9c0">More...</a><br/></td></tr>
<tr class="separator:gaf5d3e01cba7a5d0029901f690007a9c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa69407558163d5fc58ac9621b3e313a3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gaa69407558163d5fc58ac9621b3e313a3">XCSUDMA_STS_OFFSET</a>&#160;&#160;&#160;0x008U</td></tr>
<tr class="memdesc:gaa69407558163d5fc58ac9621b3e313a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status Register Offset.  <a href="group__csuma__api.html#gaa69407558163d5fc58ac9621b3e313a3">More...</a><br/></td></tr>
<tr class="separator:gaa69407558163d5fc58ac9621b3e313a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60d1ed5209af6a5d9e9c55b6b95052de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga60d1ed5209af6a5d9e9c55b6b95052de">XCSUDMA_CTRL_OFFSET</a>&#160;&#160;&#160;0x00CU</td></tr>
<tr class="memdesc:ga60d1ed5209af6a5d9e9c55b6b95052de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control Register Offset.  <a href="group__csuma__api.html#ga60d1ed5209af6a5d9e9c55b6b95052de">More...</a><br/></td></tr>
<tr class="separator:ga60d1ed5209af6a5d9e9c55b6b95052de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab56adb100901bb2b042a842619064ce5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gab56adb100901bb2b042a842619064ce5">XCSUDMA_I_STS_OFFSET</a>&#160;&#160;&#160;0x014U</td></tr>
<tr class="memdesc:gab56adb100901bb2b042a842619064ce5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Status Register Offset.  <a href="group__csuma__api.html#gab56adb100901bb2b042a842619064ce5">More...</a><br/></td></tr>
<tr class="separator:gab56adb100901bb2b042a842619064ce5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Size register bit masks and shifts</div></td></tr>
<tr class="memitem:ga2e9db5623d0c9b85088c528d43c9b411"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga2e9db5623d0c9b85088c528d43c9b411">XCSUDMA_SIZE_MASK</a>&#160;&#160;&#160;0x1FFFFFFCU</td></tr>
<tr class="memdesc:ga2e9db5623d0c9b85088c528d43c9b411"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask for size.  <a href="group__csuma__api.html#ga2e9db5623d0c9b85088c528d43c9b411">More...</a><br/></td></tr>
<tr class="separator:ga2e9db5623d0c9b85088c528d43c9b411"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf0a5114bb4e675c0e9d933a2d235ac6f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gaf0a5114bb4e675c0e9d933a2d235ac6f">XCSUDMA_LAST_WORD_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:gaf0a5114bb4e675c0e9d933a2d235ac6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Last word check bit mask.  <a href="group__csuma__api.html#gaf0a5114bb4e675c0e9d933a2d235ac6f">More...</a><br/></td></tr>
<tr class="separator:gaf0a5114bb4e675c0e9d933a2d235ac6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae1d5689d4fbd05c2e7f6b2a34bcbfb09"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gae1d5689d4fbd05c2e7f6b2a34bcbfb09">XCSUDMA_SIZE_SHIFT</a>&#160;&#160;&#160;2U</td></tr>
<tr class="memdesc:gae1d5689d4fbd05c2e7f6b2a34bcbfb09"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for size.  <a href="group__csuma__api.html#gae1d5689d4fbd05c2e7f6b2a34bcbfb09">More...</a><br/></td></tr>
<tr class="separator:gae1d5689d4fbd05c2e7f6b2a34bcbfb09"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Interrupt Enable/Disable/Mask/Status registers bit masks</div></td></tr>
<tr class="memitem:ga33dc1a1076170c9ca47df1c3451bdfe5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga33dc1a1076170c9ca47df1c3451bdfe5">XCSUDMA_IXR_FIFO_OVERFLOW_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga33dc1a1076170c9ca47df1c3451bdfe5"><td class="mdescLeft">&#160;</td><td class="mdescRight">FIFO overflow mask, it is valid only to Destination Channel.  <a href="group__csuma__api.html#ga33dc1a1076170c9ca47df1c3451bdfe5">More...</a><br/></td></tr>
<tr class="separator:ga33dc1a1076170c9ca47df1c3451bdfe5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6e7d15f2dfaa7afef685f382db12c62e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga6e7d15f2dfaa7afef685f382db12c62e">XCSUDMA_IXR_INVALID_APB_MASK</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memdesc:ga6e7d15f2dfaa7afef685f382db12c62e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Invalid APB access mask.  <a href="group__csuma__api.html#ga6e7d15f2dfaa7afef685f382db12c62e">More...</a><br/></td></tr>
<tr class="separator:ga6e7d15f2dfaa7afef685f382db12c62e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf727ccf4d9bbbce46d61f67be041b40c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gaf727ccf4d9bbbce46d61f67be041b40c">XCSUDMA_IXR_FIFO_THRESHHIT_MASK</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memdesc:gaf727ccf4d9bbbce46d61f67be041b40c"><td class="mdescLeft">&#160;</td><td class="mdescRight">FIFO threshold hit indicator mask.  <a href="group__csuma__api.html#gaf727ccf4d9bbbce46d61f67be041b40c">More...</a><br/></td></tr>
<tr class="separator:gaf727ccf4d9bbbce46d61f67be041b40c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadb917cad64699bd0fc6e21c1fec74068"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gadb917cad64699bd0fc6e21c1fec74068">XCSUDMA_IXR_TIMEOUT_MEM_MASK</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memdesc:gadb917cad64699bd0fc6e21c1fec74068"><td class="mdescLeft">&#160;</td><td class="mdescRight">Time out counter expired to access memory mask.  <a href="group__csuma__api.html#gadb917cad64699bd0fc6e21c1fec74068">More...</a><br/></td></tr>
<tr class="separator:gadb917cad64699bd0fc6e21c1fec74068"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7fc13f5152cf0098d76d4b78b08702e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga7fc13f5152cf0098d76d4b78b08702e8">XCSUDMA_IXR_TIMEOUT_STRM_MASK</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memdesc:ga7fc13f5152cf0098d76d4b78b08702e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Time out counter expired to access stream mask.  <a href="group__csuma__api.html#ga7fc13f5152cf0098d76d4b78b08702e8">More...</a><br/></td></tr>
<tr class="separator:ga7fc13f5152cf0098d76d4b78b08702e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac6e2bc9f25b7160249710c395a74d933"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gac6e2bc9f25b7160249710c395a74d933">XCSUDMA_IXR_AXI_WRERR_MASK</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memdesc:gac6e2bc9f25b7160249710c395a74d933"><td class="mdescLeft">&#160;</td><td class="mdescRight">AXI Read/Write error mask.  <a href="group__csuma__api.html#gac6e2bc9f25b7160249710c395a74d933">More...</a><br/></td></tr>
<tr class="separator:gac6e2bc9f25b7160249710c395a74d933"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0dbd333c70de601e769b8542552eb7e4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga0dbd333c70de601e769b8542552eb7e4">XCSUDMA_IXR_DONE_MASK</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memdesc:ga0dbd333c70de601e769b8542552eb7e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Done mask.  <a href="group__csuma__api.html#ga0dbd333c70de601e769b8542552eb7e4">More...</a><br/></td></tr>
<tr class="separator:ga0dbd333c70de601e769b8542552eb7e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga670d9fac28bd9de6b6f6abcb5fda64cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga670d9fac28bd9de6b6f6abcb5fda64cc">XCSUDMA_IXR_MEM_DONE_MASK</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memdesc:ga670d9fac28bd9de6b6f6abcb5fda64cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory done mask, it is valid only for source channel.  <a href="group__csuma__api.html#ga670d9fac28bd9de6b6f6abcb5fda64cc">More...</a><br/></td></tr>
<tr class="separator:ga670d9fac28bd9de6b6f6abcb5fda64cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga441edc2ec9eadb8093ac0ab41e0162d2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga441edc2ec9eadb8093ac0ab41e0162d2">XCSUDMA_IXR_SRC_MASK</a>&#160;&#160;&#160;0x0000007FU</td></tr>
<tr class="memdesc:ga441edc2ec9eadb8093ac0ab41e0162d2"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment"> ((XCSUDMA_IXR_INVALID_APB_MASK)|
</pre><p> (XCSUDMA_IXR_FIFO_THRESHHIT_MASK) | (XCSUDMA_IXR_TIMEOUT_MEM_MASK) | (XCSUDMA_IXR_TIMEOUT_STRM_MASK) | (XCSUDMA_IXR_AXI_WRERR_MASK) | (XCSUDMA_IXR_DONE_MASK) | (XCSUDMA_IXR_MEM_DONE_MASK))  <a href="group__csuma__api.html#ga441edc2ec9eadb8093ac0ab41e0162d2">More...</a><br/></td></tr>
<tr class="separator:ga441edc2ec9eadb8093ac0ab41e0162d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadfb7ef2922c9ceb4804bc87620c35134"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#gadfb7ef2922c9ceb4804bc87620c35134">XCSUDMA_IXR_DST_MASK</a>&#160;&#160;&#160;0x000000FEU</td></tr>
<tr class="memdesc:gadfb7ef2922c9ceb4804bc87620c35134"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment"> ((XCSUDMA_IXR_FIFO_OVERFLOW_MASK) |
</pre><p> (XCSUDMA_IXR_INVALID_APB_MASK) | (XCSUDMA_IXR_FIFO_THRESHHIT_MASK) | (XCSUDMA_IXR_TIMEOUT_MEM_MASK) | (XCSUDMA_IXR_TIMEOUT_STRM_MASK) | (XCSUDMA_IXR_AXI_WRERR_MASK) | (XCSUDMA_IXR_DONE_MASK))  <a href="group__csuma__api.html#gadfb7ef2922c9ceb4804bc87620c35134">More...</a><br/></td></tr>
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<tr><td colspan="2"><div class="groupHeader">Software done timeout value</div></td></tr>
<tr class="memitem:ga0bd0c9763013ce910920b46ad35d10ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__csuma__api.html#ga0bd0c9763013ce910920b46ad35d10ba">XCSUDMA_DONE_TIMEOUT_VAL</a>&#160;&#160;&#160;300000000U</td></tr>
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